1. Field of the Invention
The present invention relates to a semiconductor chip for a USB device, more particularly to a device for controlling a plurality of endpoints of the USB device and a method of controlling a plurality of endpoints of the USB device.
2. Description of the Related Art
Generally, various peripheral devices (for example a keyboard, a mouse, a monitor, a web camera, a joystick, a storage device, etc.) can connect (in a plug-and-play fashion) to a bus system of a host computer that conforms to the USB (Universal Serial Bus) specification. A USB system includes a USB host, a USB device and a USB interconnector. The USB host is connected to the USB device through a bus topology such as a tiered star topology, such as is shown in system 100 of FIG. 1 according to Related Art.
In the USB-complaint star topology of system 100, there can be up to seven layers. A USB hub is a center to which USB devices are connected. A host 102 is a root hub and represents a first layer. Host 102 is connected to the devices in a point-to-point method. A first hub 106 and a device (which is also described as a function) 104 are each connected to the host 102, and together represent a second layer. A second hub 112 and functions 108 and 110, which are connected to the first hub 106, and together represent a third layer. Fourth and subsequent layers have similar architectures.
USB host 102 is the only host in system 100. USB host 102 includes a host controller (see 212a of FIG. 2, mentioned below). Each of hubs 106, 112 and 114 provides USB system 100 with additional connection points. Devices 104, 108, 110 and 116 provide USB system 100 with various functions such as a joystick, a speaker, etc., and have been assigned unique USB addresses by USB host 102 according to which they are accessed, respectively. A physical signal cable connects USB host 102 and the USB device. The physical signal cable comprises a line supplying VBUS=+5 volts, data lines D+, D− and a ground line (GND).
According to the USB standard, data transfer speed is about 480 Mb/s in high-speed signaling mode, about 12 Mb/s in full-speed signaling mode, and about 1.5 Mb/s in low-speed signaling mode.
FIG. 2 is schematic view showing connections between a USB host and a USB device according to the USB specification of the Related Art.
Referring to FIG. 2, USB host 210 includes USB bus interface 212, USB system software 214 and client software 216. USB bus interface 212 has a host controller 212a and an SIE (Serial Interface Engine) 212b. USB device 220 has an architecture corresponding to that of USB host 210. As such, USB device 220 includes a USB bus interface 222 having an SIE 222b, a USB logical device 224 having an endpoint zero (EP0), and a function unit (hereafter function) 226. USB host 210 is physically connected to USB device 220 by a USB cable through SIEs 212b and 222b of USB bus interfaces 212 and 222, respectively.
USB system software 214 of USB host 210 manages USB device 220 through a logical default control pipe that is set to be connected to endpoint 0 (EP0). Client software 216 of USB host 210 communicates with function 226 of the USB device 220 through a plurality of logical pipes (hereafter pipes). Each logical pipe can be thought of as an independent channel that connects USB host 210 and the endpoints of USB device 220.
FIG. 3 is schematic view showing data interchange through pipes between USB host 210 and USB device 220 of FIG. 2 according to the USB specification of the Related Art.
Referring to FIG. 3, USB device 210 includes a plurality of endpoints each of which are identified by an endpoint number. Buffers of USB host 210 are connected to the endpoints of USB device 220 through the pipes. The pipes are independent from each other. Data flows through the pipes between USB host 210 and USB device 220. Properties of the endpoints vary depending upon bus access frequency, bandwidth, endpoint number, error processing procedure, maximum packet size, transfer type, and direction of data flow. For example, one endpoint corresponds to one application. Maximum packet size is determined in accordance with characteristics of USB host 210 and USB device 220, and varies depending on each of the endpoints.
In all USB devices, endpoint 0 is a default control pipe, the USB system software configures the USB device using endpoint 0, and the other endpoints are formed after the configuration of the USB device is completed through the default control pipe.
A USB bus protocol uses a polled token bus. Host controller 212a manages the transfer of all data. Most bus transactions, as shown in FIG. 4, includes the transfer of 3 packets.
FIGS. 4A and 4B are schematic views showing bus transactions according to the USB specification of the Related Art.
In the beginning of the bus transaction, host controller 210 sends a token packet. The token packet identifies the type of the bus transaction, a direction of the bus transaction, an address of USB device 220 and an endpoint number.
There are two directions of the bus transaction, namely an ‘IN’ direction and an ‘OUT’ direction. With the ‘IN’ bus transaction, as shown in FIG. 4A, data are transferred from USB device 220 to USB host 210. With the ‘OUT’ bus transaction, as shown in FIG. 4B, data are transferred from USB host 210 to the USB device 220.
USB host 210 or USB device 220 responds to receipt of data by sending a handshake packet. An ‘ACK’ handshake packet represents that USB host 210 or USB device 220 received data normally, and a ‘NAK’ handshake packet represents that USB host 210 or USB device 220 didn't receive data or that an error (such as a buffer becoming completely filled) occurred while USB host 210 or USB device 220 receives data. USB host 210 or USB device 220 resends the data.
Different types of packets are exchanged according to the USB standard. The type of packet is denoted by its packet identifier (PID). Within a type, there are various kinds of packets. Table 1 lists the various kinds of packets according to type (PID), and includes the name of each kind, the value of the PID field and a description. PID (Packet Identifier), Representative packet formats are shown in FIGS. 5A-5D according to the Related Art.
TABLE 1PIDKindPID type(name)PID <3:0>DescriptionOUT0001token for transfer data via ‘OUT’bus transactionIN1001token for transfer data via ‘IN’ bustransactionSOF0101start of frame (1 ms or 125 μm)tokenTokenSETUP1101setup tokenDataDATA00011data packet PID evenDATA11011data packet PID oddDATA20111data packet in high-speed signalingmodeM DATA1111data packet in high-speed signalingmodeHandshakeACK0010handshake response when data arereceived without errorNAK1010handshake response when data arereceived with errorSTALL1110control pipe is not readyNYET0110no response yetSpecialPRE1100PREambleERR1100ERRSPLIT1000SplitPING0100Ping
FIG. 5A generally shows a format of a token packet 502, FIG. 5B specifically shows a format of a SOF (Start-Of-Frame) token packet 504, FIG. 5C generally shows a format of a data packet, and FIG. 5D generally shows a format of a handshake packet, all according to the USB specification of the Related Art.
General token packet 502 of FIG. 5A comprises an 8 bit PID field, a 7 bit address (ADDR) field, a 4 bit endpoint (ENDP) field and a 5 bit CRC field. Thus, the token packet 502 is described as having 3 bytes. SOF token packet 506 of FIG. 5B comprises an 8 bit PID field, an 11 bit of frame number field and a 5 bit CRC5 field. SOF token packet 504 represents a start of a frame. The period of a frame is about 1 ms in the full-speed signaling mode, and about 125 μm in the high-speed signaling mode. Data packet 506 of FIG. 5C comprises an 8 bit PID field, a data field having 0-8192 bits and a 16 bit CRC field. Handshake packet 508 of FIG. 5D comprises only an 8 bit PID field.
A USB host 102/210 may allocate addresses 0-127, or a maximum of 128 addresses, since the address (ADDR) field has 7 bits. A maximum of 127 USB devices may be connected to USB host 210 because one address is reserved for USB host 210. Each of the USB devices may allocate a maximum of 16 endpoints since the endpoint (ENDP) field has 4 bits.
The data transfer efficiency of an ‘OUT’ bus transaction between USB host 210 and USB device 220 greatly depends upon the configuration of the buffers used in the endpoint. In the case that the endpoint for receiving data from USB host 210 has only one buffer, data transfer speed decreases when the buffer is full of data because a NAK packet is generated and data transfer is temporarily interrupted.
An ‘OUT’ endpoint according to the Related Art, as shown in FIG. 6, has buffers 624 of a ‘ping pong’ configuration. Buffers 624 are located between an SIE 622 and a microprocessor control unit (MCU) interface 626 in a USB device 620. Each of endpoints (EP0, EP1, . . . , EPx) has two buffers (A, B).
Referring to FIG. 6, in considering the following case. A specific endpoint (EPx) receives first data from a USB 610 host and stores it in buffer A. Before a peripheral MCU fetches (via MCU interface 626) the first data stored in the buffer A, second data 626 are received from USB host 610 and stored in buffer B so that generation of a NAK can be avoided. When MCU 626 fetches the first data stored in buffer A and then endpoint EPx receives third data, endpoint EPx stores the third data in buffer A. Such a ‘ping pong’ buffer alternately stores data in buffers A and B.
However, since each of the endpoints requires two buffers of maximum packet size, a USB device 620 using the size maximum number of endpoints (16) will have 32 such maximum size buffers. Therefore, as the number of endpoints and the size of the buffers increase, the area of semiconductor chip for the buffers increases, power consumption of the USB device increases, and cost for the USB device increases.
Even though each of the endpoints has two buffers (A and B), the two buffers may not accommodate all of the data when a specific endpoint abruptly receives a relatively large amount of data as compared with other endpoints, and a NAK may be generated. In addition, when a specific endpoint receives a relatively smaller amount of data as compared with other endpoints, the specific endpoint requires only one buffer instead of two buffers. Therefore, resources of the USB device may be wasted.